Professor of Electrical Engineering and Computer Science Dr. Savas Kaya is using an approach called gate work-function engineering to make small electronic devices more efficient.
By Amanda Biederman
NQPI editorial intern
In 1946, the world’s first functional digital computer filled an entire room and weighed nearly 30 metric tons. As technological advances have expanded over the decades, technological devices have undoubtedly shrunk.
Yet Dr. Savas Kaya, an Ohio University professor of Electrical Engineering and Computer Science and a Nanoscale and Quantum Phenomena Institute member, said these modern chips are rapidly approaching their lower size limit.
“It’s gotten really difficult and expensive to continue scaling dimensions down,” Kaya said. “We’re running out of space … because we’re reaching literally at the atomic level. You’re playing dimension games with few layers of atoms.”
The majority of electronics contain complementary metal oxide semiconductor (CMOS) chips that are used to store code and perform logic computing. CMOS chips have been the dominant technology in computational devices for the past 40 years, and they have led to production of pocket-sized electronics as they have become progressively smaller.
Inside these CMOS chips is a system of semiconductor devices called transistors, which are essential for binary computation. Rather than attempt to make these already tiny transistors even smaller, Kaya’s team is working to make these devices more efficient. This would result in a design that can lower power dissipation, which would prevent overheating. This would also help extend the battery lives of small electronics.
Kaya and doctoral student Talha Furkan Canan are using an approach called gate work-function engineering, which involves the integration of metals that direct the flow of electrons in the chip. This approach is used to tailor the logic functions that are obtained from these transistors. Kaya and Canan are incorporating multiple gate metals into a single transistor, with two gates on opposite ends.
Kaya said their proposed design, a Schottky Barrier FinFET with two independent gate contacts, can carry out the same logic operations using fewer transistors. By lowering the number of transistors, they have shown that power consumption can go down an order of magnitude without sacrificing speed.
“Chips using our proposed transistors will be way ‘cooler,’” Kaya said. “And pun is totally intended.”
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